The Taiwan External Trade Development Council (TAITRA) confirmed that Rafael Sotomayor, President and CEO of NXP Semiconductors, has been booked to speak at the upcoming COMPUTEX 2026. His session, slated for the afternoon of June 2 – the second day of the show – will be held on the second floor of the Taipei World Trade Center.
Physical‑AI Takes Center Stage
Sotomayor’s address is expected to focus on what NXP terms “physical AI” – the convergence of edge computing, real‑time decision making and embedded intelligence that brings artificial‑intelligence capabilities out of the data center and into devices that interact directly with the physical world. In a brief preview, the company described the theme as follows:
“At the intelligent edge—where data meets real‑time decisions—NXP is setting the pace for edge and physical AI. By combining leadership in secure, intelligent edge computing with scalable AI enablement, NXP is empowering customers to build smarter, safer, and more autonomous systems across the physical world.”
The keynote will reportedly dissect the “thesis” behind physical AI, outlining the technical hurdles that must be cleared for widespread adoption, the architectural shifts required to sustain high‑throughput inference at the edge, and the security and safety guarantees enterprises demand from AI‑enabled hardware.
Why It Matters for Enterprises and Developers
Physical AI is more than a buzzword; it directly addresses a growing demand among manufacturers, logistics providers, and industrial IoT players for on‑device inference that can operate without constant cloud connectivity. By processing data locally, edge devices can reduce latency, lower bandwidth costs, and mitigate privacy concerns – all critical factors for regulated industries such as healthcare, automotive and critical infrastructure.
NXP’s portfolio, which includes secure microcontrollers, AI‑accelerated processors and connectivity solutions, positions the company as a potential one‑stop shop for organizations building end‑to‑end edge pipelines. If Sotomayor’s keynote delivers concrete roadmaps for integrating NXP’s hardware with existing MLOps frameworks, developers could see a smoother path from model training in the cloud to deployment on silicon that already includes hardware‑based security enclaves.
Registration and Access
TAITRA noted that registration for the COMPUTEX keynote will open in mid‑April. Interested parties are encouraged to monitor the official COMPUTEX website for the exact launch date and to sign up early, as space for the session may be limited.
COMPUTEX 2026: A Broader AI Showcase
The event itself, themed “AI Together,” runs from June 2 to June 5 across two major venues: the Taipei Nangang Exhibition Center Hall 1 & 2, and the Taiwan World Trade Center (TWTC) and Taipei International Convention Center (TICC). Organizers anticipate participation from roughly 1,500 exhibitors occupying up to 6,000 booths. The show will be divided into three primary tracks:
- AI & Computing – covering data‑center accelerators, cloud‑native AI platforms and the software stack that glues them together.
- Robotics & Mobility – highlighting autonomous systems, advanced driver‑assistance, and next‑generation robotic process automation.
- Next‑Gen Tech – a catch‑all for emerging form factors such as quantum‑inspired processors, neuromorphic chips and novel interconnect standards.
For enterprises scouting new partners or evaluating hardware roadmaps, COMPUTEX offers a rare chance to see a wide swath of the AI ecosystem under one roof, from silicon vendors to system integrators and software providers.
Industry Context: Edge AI’s Growing Momentum
The push toward edge‑first AI architectures has accelerated over the past two years, driven by stricter data‑sovereignty regulations and the cost pressures of streaming massive sensor data to centralized clouds. According to IDC, worldwide spending on edge AI hardware is projected to exceed $12 billion by 2027, with a compound annual growth rate of roughly 28 percent. NXP’s emphasis on secure, low‑power AI cores aligns with this trajectory, suggesting the company is targeting a segment that values both compute density and tamper‑resistant design.
Security, in particular, remains a top concern. Enterprise customers frequently cite the risk of model theft or tampering as a barrier to on‑device AI deployment. NXP’s long‑standing focus on hardware‑rooted security – exemplified by its Secure Element and TrustZone technologies – could give it a competitive edge (no pun intended) in markets where compliance with standards such as IEC 62443 or ISO 27001 is non‑negotiable.
What to Watch After the Keynote
- Roadmap Details: Any concrete product timelines for NXP’s upcoming AI‑accelerated microcontrollers or system‑on‑chip (SoC) families.
- Ecosystem Partnerships: Announcements of collaborations with major cloud providers, MLOps platforms or OEMs that could accelerate adoption.
- Developer Enablement: Availability of SDKs, reference designs, or open‑source tooling that lowers the barrier for engineers to port models onto NXP silicon.
- Security Frameworks: Specifics on how NXP plans to integrate AI model integrity checks, secure boot and enclave‑based inference into its hardware.
These signals will help enterprises gauge whether NXP’s physical‑AI strategy is ready for production deployment or remains in the experimental phase.
How to Learn More
Further details about the exhibition, registration and the full agenda are available on the official COMPUTEX site (www.computextaipei.com.tw/en/index.html) and the InnoVEX portal (www.innovex.com.tw).
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