Marvell Technology is demonstrating a new generation of 2nm optical interconnect technologies designed to help AI data centers move from 1.6T toward 3.2T networking. At ECOC 2026, the semiconductor company is showcasing 400G-per-lane PAM4, 800G ZR/ZR+ with integrated MACsec, 1.6T coherent links and a 102.4Tbps co-packaged optics platform.
The race to scale AI infrastructure is increasingly becoming a race to move data efficiently between compute resources. As accelerator clusters expand across racks, campuses and geographically distributed facilities, optical interconnects must deliver more bandwidth while controlling power consumption, latency and security.
Marvell Technology is addressing that challenge with a series of 2nm optical interconnect demonstrations at ECOC 2026 in Málaga, Spain, covering technologies aimed at AI scale-up, scale-out and scale-across networks.
The company’s demonstrations include what Marvell describes as the first 2nm 400G-per-lane optical PAM4 demonstration, a live 2nm 800G ZR/ZR+ pluggable with integrated Media Access Control Security (MACsec), and 2nm 1.6T ZR and coherent-lite O-band technologies. Marvell is also showing a 102.4Tbps co-packaged optics (CPO) platform using 200G-per-lane silicon photonics.
The significance is the progression in lane speeds. Moving from 200G to 400G per lane allows optical systems to reach aggregate bandwidth levels such as 3.2T without requiring a proportional increase in the number of physical lanes. For AI fabrics, where large numbers of accelerators exchange data continuously, increasing bandwidth density can reduce the physical and power overhead associated with networking.
Marvell’s 400G-per-lane PAM4 demonstration is positioned as a technology step toward 3.2T data-center connectivity. PAM4 remains important because it can increase the amount of data carried per signaling cycle without doubling the fundamental symbol rate, although it also creates additional signal-integrity and error-management requirements.
The company is applying its 2nm process technology across several optical architectures rather than pursuing a single interconnect model. That includes short-reach PAM4 connectivity, coherent-lite technologies for intermediate distances and ZR/ZR+ coherent optics for data-center interconnects.
This matters because AI infrastructure increasingly operates across different physical domains. Within an AI system, high-speed optical connections can link accelerators and switches; between buildings or campuses, coherent optics can extend those networks across much longer distances.
Marvell’s 800G ZR/ZR+ demonstration adds another dimension: security at the optical interconnect layer. Its Libra 2nm coherent DSP integrates MACsec, allowing Ethernet traffic to be protected within the optical module rather than relying exclusively on security capabilities elsewhere in the network. Marvell says its coherent platforms are designed for scale-across connectivity between data centers and regional AI infrastructure.
The company is also demonstrating 1.6T ZR and coherent-lite O-band technologies. These architectures are intended to provide high-bandwidth connectivity both within and between data-center facilities, creating a path toward higher-capacity AI networking.
The need for that capacity is reflected in the scale of current infrastructure investment. IDC says worldwide AI infrastructure spending reached $318 billion in 2025 and forecasts approximately $487 billion in 2026, with spending expected to exceed $1 trillion by 2029.
That spending increasingly extends beyond GPUs and AI servers. Networking silicon, optical transceivers, switches, interconnects and photonics are becoming critical components of AI infrastructure because the performance of an accelerator cluster depends partly on how quickly its compute resources can exchange data.
Marvell’s CPO demonstration targets that problem by moving optics closer to the switching or accelerator silicon. The company’s platform integrates optical components directly with AI accelerators and switch silicon and is demonstrated at 102.4Tbps using 200G-per-lane silicon photonics.
CPO becomes more relevant as electrical connections encounter increasing distance and power constraints. Instead of moving ever-faster electrical signals across longer board and package traces, optical conversion can occur closer to the compute or switching device.
The resulting architecture is broader than a faster optical module. Marvell is effectively presenting a portfolio spanning scale-up, scale-out and scale-across connectivity: from links inside AI systems to connections between racks and data centers.
That strategy puts the company into competition across several layers of the AI networking stack, alongside semiconductor and infrastructure vendors developing high-speed SerDes, optical DSPs, silicon photonics, Ethernet switching and co-packaged optics.
The immediate demonstrations remain technology milestones rather than evidence of broad commercial deployment. Still, they illustrate where AI networking is heading: higher lane speeds, greater optical density, lower power per bit and stronger security as AI clusters grow.
For data-center operators, the objective is ultimately straightforward—move more data between increasingly powerful compute resources without allowing networking to become the limiting factor. Marvell’s 2nm optical roadmap is aimed squarely at that challenge.
Market Landscape
AI infrastructure investment is creating a rapid upgrade cycle across networking and semiconductor technologies. IDC forecasts global AI infrastructure spending of $487 billion in 2026 and more than $1 trillion by 2029.
Within that market, optical connectivity is evolving alongside accelerator and switch architectures. 800G is moving into deployment while 1.6T and 3.2T technologies are emerging for higher-density AI fabrics. Marvell is also positioning coherent ZR/ZR+ technologies for geographically distributed AI infrastructure, where data centers can function as connected compute resources rather than isolated facilities.
The competitive technology landscape includes NVIDIA, Broadcom and other suppliers working across Ethernet, InfiniBand, optical DSPs, silicon photonics, SerDes and CPO. The common challenge is reducing the networking cost, power and latency associated with increasingly large AI clusters.
Top Insights
- Marvell is demonstrating 2nm optical technologies spanning 400G-per-lane PAM4, 800G coherent links and 1.6T connectivity for AI infrastructure.
- The 400G-per-lane PAM4 demonstration targets the transition toward 3.2T data-center connectivity and higher bandwidth density.
- Integrated MACsec adds security directly to Marvell’s 800G ZR/ZR+ optical architecture for distributed AI infrastructure.
- Marvell’s 102.4Tbps CPO demonstration shows how silicon photonics can move closer to accelerators and switch silicon.
- The portfolio reflects a broader AI networking shift toward higher lane rates, optical density, lower power and geographically distributed compute.
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